Publications
Ruhil, S., Dutta, U., Khanna (2022)
Design of a 30 Nm Novel 3-D Quad Gate Stacked Nano-Sheets FinFET. Silicon (2022). https://doi.org/10.1007/s12633-022-01911-4
Ruhil, S., Khanna, V., Dutta, U., Shukla, N. (2021)
A study of emerging semi-conductor devices for memory applications. International Journal of Nano Dimension, 12(3), 186-202. doi: 10.22034/ijnd.2021.680122
Dutta U, Soni MK, Pattanaik M (2019)
Simulation study of hetero dielectric tri material gate tunnel FET based common source amplifier circuit. AEU-International J Electron Commun 99:258–263
U. Dutta, M.K. Soni, M. Pattanaik (2018)
Design & optimization of gate-all-around tunnel FET for low power applications. Int. J. Eng. Technol. UAE 7(4), 2263–2270 (2018). https://doi.org/10.14419/ijet.v7i4.12352
Shikha Rai, Umesh Dutta (2017)
Process Variation Aware FINFET based Digital Circuits Design”, Current Trends in Technology and Science, ISSN: 2279-0535. Volume: VI, Issue: V-SEP 2017, Page No: 747- 751.
Umesh Dutta, M.K Soni, Manisha Pattanaik (2016)
A Review of NBTI Degradation and its Impact on the Performance of SRAM”, International Journal of Modern Education and Computer Science (IJMECS), Vol.8, No.6, pp.57-65, 2016.DOI: 10.5815/ijmecs.2016.06.08
Ashish Sharma , Umesh Dutta , Sneha Arora , Vipin Kumar Sharmam(2016)
Design & Optimization of CNTFET based Domino 1- Bit ALU “, International Journal of Advanced Research in Computer and Communication Engineering, Vol. 5, Issue 5, May 2016 , pp.125-131, DOI: 10.17148/IJARCCE.2016.5531.
Ashish Sharma , Umesh Dutta , Sneha Arora (2016)
Comparative Analysis of Performance of CNTFET Based Static & Domino Logic ALU”, International Journal of Innovative Research in Computer and Communication Engineering, Vol. 4, Special Issue 4, August 2016 , pp.47-54.
Akshay Angaria, Umesh Dutta, Sneha Arora(2016)
Design & Optimization of FINFET Based Domino Logic Circuit”, International Journal of Technical Research and Applications, Volume 4, Issue 4, July- Aug 2016, pp.19-26.
Rahil Kumar, Kanika Sharma, Umesh Dutta(2016)
Design of Arithmetic and Logical Unit (ALU) Using FinFET”, International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, Vol. 5, Issue 5, May 2016, pp.3608-3617.
A. Kathuria, A. Aggarwal, A. Bali and U. Dutta(2015)
A novel approach for microcontroller based quality assesment system,” 2015 International Conference on Soft Computing Techniques and Implementations (ICSCTI), Faridabad, 2015, pp. 192-195. Doi: 10.1109/ICSCTI.2015.7489592
Kirti Karan, Umesh Dutta(2015)
A Design Technique To Reduce Nbti Effects From 5t Sram Cells”, Int. Journal of Engineering Research and Applications, ISSN: 2248-9622, Vol. 5, Issue 6, ( Part
– 3) June 2015, pp.81-85.
Vikas Sharma, Umesh Dutta(2015)
Designing of Low Power CNTFET Based D Flip-Flop Using Forced Stack Technique”, Int. Journal of Engineering Research and Applications, ISSN : 2248- 9622, Vol. 5, Issue 4, ( Part -6) April 2015, pp.77-81.
Vipin Kumar Sharma, Umesh Dutta, Sneha Arora, R.P. Sharma(2015)
Ground Bounce Noise Reduction in Vlsi Circuits”, Int. Journal of Engineering Research and Applications, ISSN: 2248- 9622, Vol. 5, Issue 12, (Part – 1) December 2015, pp.71-76.
Sneha Arora, Umesh Dutta, Vipin Kumar Sharma(2015)
A Noise Tolerant and Low Power Dynamic Logic Circuit Using Finfet Technology”, Int. Journal of Engineering Research and Applications, ISSN: 2248- 9622, Vol. 5, Issue 12, (Part – 1) December 2015, pp.51-56.
Neeharika, Umesh Dutta(2014)
Comparative Study of Area & Power Consumption Among Various Srams”, International Journal of Scientific Research, Volume: 3, Issue: 6, June 2014, ISSN No 2277 – 8179, pp.35-39.
Prerna Kakkar, Umesh Dutta(2014)
A Novel Approach to Recognition of English Characters Using Artificial Neural Network”, International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, Vol. 3, Issue 6, June 2014, pp.10238-10245.
Bipin Pokharel, Priya Gupta, Umesh Dutta(2013)
Designing CNTFET and Force Stacking CNTFET Inverter for the Analysis of Average Power and PDP at Different Low Supply Voltage”, International Journal of Engineering Research and Applications, ISSN: 2248-9622, Vol. 3, Issue 4, Jul-Aug 2013, pp.1845-1855.
Naresh Kumar, Umesh Dutta and Dileep Kumar Naresh Kumar(2012)
Design of Low Voltage and Low Power D-Flip Flop”, International Journal of Scientific Engineering and Technology, ISSN: 2277-1581, 01 July 2012, Volume No.1, Issue No.3, pg: 184-186.
Umesh Dutta, Pankaj Kumar, Naresh Kumar(2012)
Noise Tolerance Enhancement with Leakage Current Reduction in Dynamic Logic Circuits”, International Journal of Scientific Engineering and Technology, ISSN: 2277-1581, 01 July 2012, Volume No.1, Issue No.3, pg: 137-142.
Gyan Prakash, Umesh Dutta, Mohd. Tauheed Khan(2012)
Dynamic Power Reduction in SRAM”, International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622, Vol. 2, Issue 5, September- October 2012, pp.1781-1784.
Shruti Vashist, Umesh Dutta, M.K.Soni(2012)
Design and Performance Analysis of Rotman Lens”, International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622, Vol. 2, Issue4, July-August 2012, pp.1792-1795.